Method and device for adjusting the phase for flat screens

ABSTRACT

A method and a device for correcting the phase between the pixel clock of a graphics card and the sampling clock of a flat-panel display with an analog interface in a system including a flat-panel display, graphics card, and computer. Automatic adjustment of the phase is performed repeatedly. In the process, the rising edge of a video pulse of a sufficiently bright image spot in the first image column close to the back-porch region is determined. The falling edge of a video pulse is determined at a sufficiently bright image spot in the last image column close to the front-porch region, and the phase is adjusted such that the sampling instant is situated approximately at the midpoint between the rising and falling edges of a video pulse.

RELATED APPLICATION

This application is a U.S. Continuation Application under 35 USC 371 ofInternational Application PCT/DE00/00819 filed Mar. 16, 2000.

The invention relates to a method and a device for correcting the phasebetween the pixel clock of a graphics card and the sampling clock of aflat-panel display with an analog interface in a system comprisingflat-panel display, graphics card and computer.

Flat-panel displays with an analog interface must be adapted to thegraphics card of the connected computer. If phase or sampling frequencyis incorrectly adjusted, the image appears fuzzy and containsinterferences. Whereas the values for image location, or in other wordsright-left and top-bottom adjustment, and for sampling frequency can bedefined as preadjusted values in the case of standard modes, this is notpossible for the phase, since the phase depends on the graphics cardused and also on the video circuit.

Prior art flat-panel displays are usually provided with amicroprocessor, which is responsible for general control of theflat-panel display. This microprocessor is configured such that it canalso recognize the video mode adjusted on the computer. If the mode hasalready been adjusted at the factory or by the user, the flat-paneldisplay is operated with the stored adjustments for image location,sampling frequency and phase. On the other hand, if the mode is onewhich has not yet been implemented in the microprocessor of theflat-panel display, standard values are assumed for image location,sampling frequency and phase. These standard values are not satisfactoryin all cases.

The adjustment of the sampling clock and of the phase have a directeffect on image quality. An optimal sampling frequency is achieved whenthe sampling of all pixels, in one line of a video signal, for example,takes place in a stable or characteristic region of these pixels, suchas at the center of each pixel. Data conversion then yields optimalresults. The displayed image does not contain any interferences, and isstable. In other words, the optimal sampling frequency is equal to thepixel frequency. If an incorrect sampling frequency has been adjusted,for example if the sampling clock is too fast compared with the pixelclock, the pixels are sampled at first in the permissible region, or inother words at the midpoint between two edges, but the subsequent pixelsare sampled progressively more toward one edge, until even the regionbetween two pixels is sampled, which obviously leads to unsatisfactoryimage quality. Incorrect sampling values are derived from the region inwhich the pixels are not sampled in an optimal, characteristic region.The image then exhibits strong vertical interference. The number ofregions with vertical interference that are visible on the monitorincreases as the difference between the frequencies of the samplingclock and the pixel clock becomes larger.

Even in the cases in which the sampling clock is identical to the pixelclock, however, the image quality can suffer if the phase has not beenadjusted correctly. The reason is that sampling takes place in a pixelregion that is not ideally suitable for sampling, for example too closeto the leading or trailing edge of a pixel. This problem can be solvedby shifting the phase, or in other words the sampling instant, as thewhole until sampling takes place in a characteristic or permissibleregion of the pixels. If the phase has not been adjusted correctly, theimage quality is impaired by noise signals over the entire monitor.

Flat-panel displays with analog interfaces, in which phase adjustment isautomatically performed, are already known. For such automaticphase-position adjustment, special test patterns with alternating whiteand black image spots are usually necessary, and the test pattern mustbe displayed by the graphics card. This has the disadvantage thatsoftware must be installed and started on the computer, and furthermorethat this software must be available for all common operating systems.

For satisfactory operation of the flat-panel display, it is also desiredthat the phase adjustment be stable even over the long term. Amonganalog interfaces, it is known that the analog interface is not 100%stable. For example, run times and other characteristics vary withtemperature. This instability of the analog interface also affects theimage quality of the flat-panel display. In other words, even if thesampling phase is correctly adjusted when the computer is turned on,after a certain time, such as 30 minutes, the phase had undergone adrift, which then leads to a reduction of image quality and also, inmany cases, to questions via the supplier's hotline.

In this regard, the object of the invention is to provide a method and adevice for correcting the phase in flat-panel displays, whereby acontinuously correct adjustment of the phase is possible.

To achieve this object, the inventive method is characterized in thatautomatic adjustment of the phase is performed repeatedly. For thispurpose, continuous or periodic adjustment of the phase is preferred. Inother words, the phase is repeatedly corrected either continuously orperiodically during operation of the flat-panel display, thuscompensating for drift due to temperature fluctuations or otherinfluences on the flat-panel display. Thus the flat-panel display isalways available with optimal image quality.

According to an advantageous embodiment of the inventive method, thephase adjustment necessary for the instantaneous condition of the systemis determined only at individual image spots, and the determined phaseadjustment is then applied to the entire image. In order to determinethe phase adjustment suitable for the instantaneous condition of thesystem, the phase must be adjustable. Thus, if such an adjustment is tobe performed during operation of the flat-panel display, the flat-paneldisplay would be temporarily unavailable during the phase adjustment. Ifthe phase shift necessary for the phase adjustment takes place only atindividual image spots, however, the image is temporarily distorted onlyat these individual image spots, and this is not at all perceptible inpractice. With this embodiment of the inventive method, therefore, thephase can be corrected during operation of the flat-panel display.

A further advantageous embodiment of the inventive method ischaracterized in that the pixel or pixels that is or are influenced ordistorted by matching is or are masked by distortion-free imagefragments from a video memory. In this way the influence of matching onimage quality is further reduced.

A further advantageous embodiment of the inventive method ischaracterized in that the video memory is repeatedly regenerated,preferably after every second image, in order to avoid relatively largedeviations between the current image and the image in the video memory,which is supposed to replace partial zones of the current image.

A further advantageous embodiment of the inventive method ischaracterized in that a sufficiently bright image spot is selected andthe rising edge of a video pulse of this image spot is determined, inthat a sufficiently bright image spot is selected and the rising edge ofa video pulse of this image spot is determined, and in that the phase isadjusted such that the sampling instant for the entire image is situatedapproximately at the midpoint between the rising and falling edges ofthe video pulse.

An advantageous embodiment of the inventive method is characterized inthat the rising edge of a video pulse of a sufficiently bright imagespot is determined, and in that the phase is adjusted such that thesampling instant is shifted by approximately half the width of an imagespot toward the center of the pixel.

An advantageous embodiment of the inventive method is characterized inthat the falling edge of the video pulse is determined at a sufficientlybright image spot, and in that the phase is adjusted such that thesampling instant is shifted by approximately approximately half thewidth of an image spot toward the center of the pixel.

Whereas the image-location and sampling frequencies can be determinedand correspondingly adjusted relatively simply by an algorithm, thephase position is more difficult to determine. The last three of theforegoing practical examples of the inventive method are simple andsatisfactory methods for adjusting the phases, especially since no testpatterns and no corresponding software are necessary in order toundertake automatic phase adjustment.

An advantageous embodiment of the inventive method, wherein the imagearea and image spots are arrayed on the flat-panel display in rows andcolumns between a back-porch region and a front-porch region, ischaracterized in that an image spot in the first image column close tothe back-porch region is chosen as the sufficiently bright image spotfor determination of the rising edge and an image spot in the firstimage column close to the front-porch region is chosen as thesufficiently bright image spot for determination of the falling edge.The method can be performed particularly well if the most pronouncedpossible edges are evaluated or if regions or spots disposed next to oneanother have very different brightness. Thus a spot in the first or lastimage column is particularly suitable, since it completely satisfies therequired conditions in combination with the front-porch or back-porchregion respectively, and can be found with relatively little difficulty.

An advantageous embodiment of the inventive method is characterized inthat the brightness of a plurality of image spots of the first or lastimage column is measured, and the image spots with the greatest orsufficient brightness in the first or last image column are chosen fordetermination of the rising or falling edge respectively of the videopulse. In this way it is ensured that image spots with sufficientlypronounced edges are used for the measurement.

An advantageous embodiment of the inventive method is characterized inthat the image spots (n×k) are first measured with n=1, 2, . . . N andk=constant, such as 10, and in that, if no sufficiently bright imagespot was found, the image spots (n+m)×k are measured with m=1, 2, . . .N, until a sufficiently bright image spot is found. Thereby a search forsuitable image spots is performed efficiently and in the shortest time.

An advantageous embodiment of the inventive method is characterized inthat, for determination of the amplitude values of the selected imagespots, the phases at these image spots are shifted until the measuredamplitude values no longer change significantly, and in that theamplitude values then determined are further processed.

Alternatively, an advantageous embodiment of the inventive method ischaracterized in that the phase used for determination of the amplitudevalue is advanced sufficiently that the measured amplitude values aresmaller than a predetermined limit value, for example smaller than 50%of the amplitude value, in that the phase is delayed by half the widthof a spot, and in that the amplitude value then measured is furtherprocessed.

The last two of the foregoing embodiments of the inventive method aresimple solutions in order to determine the brightness of the image spotas a prerequisite for determination of the position of the rising andfalling edge of the image spot.

A further advantageous embodiment of the invention is characterized inthat, for determination of the rising edge of the selected image spots,the phase at the selected image spot is shifted sufficiently toward theback-porch region that the measured amplitude value is reduced to apredetermined percentage, for example 50%, of the previously determinedamplitude value, and in that this value of the phase is storedtemporarily as the position of the rising edge. Yet another advantageousembodiment of the invention is characterized in that, for determinationof the falling edge of the selected image spots, the phase at theselected image spot is shifted sufficiently toward the front-porchregion that the measured amplitude value is reduced to a predeterminedpercentage, for example 50%, of the previously determined amplitudevalue, and in that this value of the phase is stored temporarily as theposition of the falling edge. In this way the rising and falling edgesof two image spots are determined in simple manner, and the phase canthen be adjusted such that it is located between the rising and fallingedges at approximately the center of an image spot.

A further advantageous embodiment of the invention is characterized inthat the phase or sampling instant is delayed relative to the midpointbetween the rising and falling edges by a predetermined amount, forexample 10% of the width of the image spot. This is advantageous inparticular for rapid video signals with overshoots, since it preventssampling from taking place in the region of the overshoot.

A further advantageous embodiment of the inventive method ischaracterized in that the sampling instant can be changed by the usercompared with the value determined during matching, in which case anoffset adjusted in this way is taken into consideration during automaticmatching. Thus, depending on the graphics card being used, the samplinginstant can be advantageously advanced or retarded slightly relative tothe value determined by matching. The offset can be adjusted, forexample, via the OSD.

To achieve the object cited hereinabove, the device for correcting thephase between the pixel clock of a graphics card and the sampling clockof a flat-panel display having an analog interface in a systemcomprising a flat-panel display, graphics card and computer, ischaracterized by a device by which automatic adjustment of the phase isperformed repeatedly, preferably continuously or periodically.

An advantageous embodiment of the inventive device is characterized byan adjusting device for shifting the phase, comprising a circuitcontaining two PLL circuits, whose outputs can be adjusted independentlyof one another as regards their phase.

A further advantageous embodiment of the inventive device ischaracterized by an adjusting device for shifting the phase, comprisinga PLL circuit with two clock outputs, whose output clock signals can beadjusted independently of one another as regards their phase.

The last two of the foregoing advantageous embodiments of the inventivedevice have the advantage that the phase can be shifted within a singleclock pulse in simple manner. By changing over between the two digitalclock outputs of the PLL circuit, it is possible, since transients areabsent, to switch forward and back without delay between the alreadyadjusted phase positions of the second outputs.

A further advantageous embodiment of the inventive device ischaracterized in that the two outputs of the PLL circuit optionallydeliver a sampling clock signal for matching and a clock signal for theentire image. Thereby the need to receive the phase is advantageouslyeliminated. An electronic changeover unit can then decide simply whichoutput is responsible at which instant for which sampling signal.

A further advantageous embodiment of the inventive device ischaracterized in that the sampling clock is delivered alternately by thetwo outputs of the PLL circuit.

A further advantageous embodiment of the inventive device ischaracterized by a PLL circuit which is programmed such that itoscillates at an integral multiple of the needed sampling frequency, andby a downstream frequency divider, which divides the sampling frequencyof the PLL circuit by a factor n, wherein n sampling signalsphase-shifted by 1/n periods relative to one another can be generated.In this case it is further advantageous for the factor n=2 to be usedand, when the phase of the PLL circuit is adjusted such that the onesampling signal is in phase with one edge of the pixel, the othersampling signal is phase-shifted by ½ pixel. As will be explainedhereinafter, this is then the ideal sampling point for sampling thepixel. The circuit necessary for this purpose is simple and inexpensive.

A further advantageous embodiment of the inventive device ischaracterized by a device which determines the rising edge of a videopulse of a sufficiently bright image spot, a device that determines thefalling edge of the video pulse at a sufficiently bright image spot, andan adjusting device with which the phase is adjusted such that thesampling instant is located at approximately the midpoint between therising and the falling edges of a video pulse.

Further advantageous embodiments of the inventive method and of theinventive device are evident from the remaining dependent claims.

Practical examples of the invention will be described hereinafter withreference to the attached drawings, wherein:

FIG. 1 shows a control circuit for a flat-panel display that can beconnected via an analog interface;

FIG. 2 schematically shows a horizontal synchronization signal and achannel of a video signal, such as the R video signal (R=red color);

FIG. 3 schematically shows the horizontal synchronization signal andseveral lines of a channel of a video signal;

FIGS. 4A and 4B show schematic representations of video signals;

FIG. 5 shows a schematic representation of the rising and falling edgesof image spots of a video signal; and

FIGS. 6A and 6B schematically show two ideal video signals and theeffect of the position of the sampling pulse in relation to the videosignal;

FIG. 7 shows a block diagram of a PLL circuit; and

FIG. 8 shows a block diagram of a further PLL circuit.

FIG. 1 shows a control circuit for a flat-panel display, which can beconnected via an analog interface, and whose function will be explainedin more detail hereinafter with reference to the various input signalsand their conditioning. At the input of the control circuit there areapplied on the one hand the video signal comprising the three colorsignals R, G, B, and on the other hand the two synchronization signalsH-sync and V-sync for horizontal and vertical image synchronization.H-sync and V-sync are transmitted digitally, with signal voltages of 0 Vand >3 V respectively. V-sync signals that the first line of an image isbeing transmitted. This signal therefore corresponds to the imagerefresh frequency and is typically in the range between 60 and 85 Hz.H-sync signals that a new image line is being transmitted. This signalcorresponds to the line frequency and is usually around 60 kHz.

The video signal made up of the color signals R, G, B is an analogsignal. The signal voltage ranges from 0 V to 0.7 V. The pixel clock, orin other words the frequency with which the value of this voltage canchange, is 80 MHz. Since a certain number of image spots is transmittedper image line, the pixel clock frequency is higher than the linefrequency (H-sync) by the number of these spots.

The three color signals R, B, G of the video signal are fed via a videoamplifier VA to analog-to-digital converters ADCR, ADCG and ADCBrespectively. The two synchronization signals H-sync and V-sync areconditioned in separate circuits HSY, VSY to the effect that the signaledges eroded by transmission and by various EMC processes areregenerated once again. The synchronization signals H-sync and V-syncconditioned in this way are then fed to a microprocessor μP. Thismicroprocessor μP measures their frequency and determines therefrom theresolution adjusted in the graphics card of the computer system. Therespective data stored on resolution are then transmitted to aphase-locked loop PLL and, parallel thereto, to a logic circuit designedin the form of an ASIC for conditioning and processing of the digitaldata.

The phase-locked loop PLL multiplies the frequency of thesynchronization signal H-sync with the value transmitted to it by themicroprocessor μP. Hereby the sampling frequency (pixel clock) isobtained. By virtue of a delay time caused in the phase-locked loop PLL,a phase difference is established between pixel clock and samplingfrequency. These two parameters can be influenced via the OSD displayson the monitor. The sampling frequency obtained in the phase-locked loopis also fed to the three analog-to-digital converters ADCR, ADCG, ADCB.These convert the analog data stream into a digital data stream. Thedigitized data are finally further processed in the downstream logiccircuit ASIC by means of data contained in a video memory VM. Whereas inthe simplest case the data are transmitted in 1:1 correspondence to theflat-panel display that can be connected to the logic circuit ASIC, thevideo memory VM is often used to achieve time decoupling between thearriving data and the data to be transmitted to flat-panel display D.Data stored in video memory VM are also accessed for interpolation oflower resolutions.

FIG. 2 shows the horizontal synchronization signal H-sync and a videosignal of one channel, for example of a red color channel R. The videosignal is selected in such a way in FIG. 2 that bright and dark imagespots are displayed alternately. The broken lines on the video signalshow the ideal sampling instant or the ideal phase for digitization ofthe analog video data. The broken areas on the first two image spotsrepresent the region of the phase which is just still permissible inorder that sampling that is still correct can be achieved. After thephase has been matched, it is therefore located on the broken lines. Ata resolution of, for example, 1024×768 image spots (XGA) and 75 Hz imagerefresh frequency, a fuzzy and highly grainy display is already obtainedat a phase shift of 4 ns. Thus matching of the phase is critical forgood image quality.

FIG. 3 shows how the information on phase position that is indispensablefor closed-loop control is obtained by determining the ideal samplinginstant for shifting the phase. If the phase is determined continuouslyand the determination of phase position were to be related to the entireimage, this would cause considerable image distortions unless additionalmeasures were taken. The image distortions occur because the phase ofthe pixel clock must be shifted in order to determine the most favorableof the various phase positions. If exclusively the phase of the imagezone to be examined, and preferably of one individual image spot, ischanged, while all other spots continue to be sampled with unchangedphase, image distortion is not perceptible, since it is limited to thisvery small zone.

FIG. 3 illustrates several lines of the video signal, wherein theinformation on the ideal phase is obtained, for example, by the methodof automatic phase matching described hereinafter. The two image spotson the basis of which the rising and falling edges are to be determinedare the first image spot in line B and the last image spot in line Y,where lines A, B, Y and Z are intended to represent arbitrary imagelines. The phase necessary for determination of the ideal samplinginstant must be confined to one of these two spots at any given time,whereas all other image spots continue to be sampled with the currentphase adjustment. For this purpose it is merely necessary that theclosed-loop control system have access to the data delivered by theanalog-to-digital converters and that the phase can be advanced orretarded selectively for a single image spot to be decided by theclosed-loop control system.

From the representations in FIGS. 4A and 4B it can also be seen that thephase of sampling of the video signal plays a large role for imagequality, and that, for different video signals, the phase in many casesmust be located at correspondingly different places. Thus FIG. 4A showsa fast video signal with overshoots, wherein the region of samplingbetween the rising and falling edges of the video signal is relativelynarrow and is shifted toward the falling edge. In contrast, FIG. 4Bshows a slow video signal without overshoots, wherein the region forsampling between the rising edge and the falling edge is relativelybroad and substantially centered. Examination of the two signals showsthat they have phase positions, for example on the right side in theregion of the falling edge of the slow video signal, in which themeasured amplitude values are no longer usable for the slow videosignal, whereas amplitude values that are still usable are measured atthe same phase position of the fast video signal. On the other hand, itis evident that the ideal phase position is located approximately at themidpoint between the rising and falling edges of the video signal andthat it must also be adjusted to this value. Thus it is extremelyimportant to adjust the phase as a function of the respective system.

As already mentioned, automatic phase adjustment is more difficult toachieve than the adjustments of the other parameters. Referring now tothe figures, it will be described how such an automatic adjustment canbe undertaken.

The starting point for determination of phase position is the edges ofthe video signals. In order to be able to determine an edge, it isadvantageous for this to be as pronounced as possible. This is the casewhen the signal is as slightly pronounced as possible ahead of the edgeand as strongly pronounced as possible after the edge, or vice versa.The first requirement is ideally satisfied by the sampling gap betweenthe back-porch and front-porch regions, and the second is satisfied by abright image spot. Accordingly, a bright image spot at the beginning ofa line is highly suitable for determination of the rising edge and oneat the end of a line is highly suitable for determination of the fallingedge.

The fact that the edges in question may belong to two different spots,which are possibly located on different image lines, is immaterial,because the pixel clock and sampling clock are known and can be takeninto consideration appropriately. The chosen image spots should havesufficiently high intensity in at least one primary color (RGB) that anedge of sufficiently large amplitude is found.

In principle, any combination of one bright and one dark image spot,which can be located at arbitrary places in the video signal, issuitable for determining the edges. In most cases, the sought edges canbe determined by the combination of front-porch/back-porch region andone bright image spot in the first/last image column. There is then noneed to search through the entire image content for two suitable pairsof spots.

As already illustrated hereinabove, the ideal range for sampling thevideo signal is that in which specified and actual value of the signalare largely in agreement. Measurement of the amplitude of the videosignal in the region of the edge, however, is possible only withdifficulty. The reason lies in the jitter of the video signal and of thesampling pulse. If this is coarse compared with the rise or fall time ofthe video signal, the edges can indeed be found by averaging severalmeasurements, but information on the amplitude of the edge at themeasured place cannot be obtained.

As explained in the foregoing, the sampling values are averaged overseveral measurements, in order to average out errors caused by jitter.Although 60 new measured values are available when the image frequencyis 60 Hz per second and image spot, the reporting of, for example, tenphase values each with ten measured values, would last close to twoseconds. To shorten this time, it is possible to consider several spotsper phase value and to sample them less often for this purpose. In thisway automatic phase matching proceeds more rapidly.

FIGS. 6A and 6B illustrate the problem of detecting the edges. Brokenlines representing the desired sampling instant are inserted at theideal video signals. The hatched area represents the region which, dueto the jitter, is actually sampled in the various measurements. If themeasured values were to be averaged, an average value of about 80% wouldbe obtained in the first case. This averaged value could be incorrectlyinterpreted as a location on the rising edge and, in fact, precisely atthe place at which this has reached 80% amplitude. This is not the case,however. In the second case, the estimate would be 50%, which already iscloser to the true situation.

From these results it is clear that, because of jitter, it will hardlybe possible to determine the place on the edge at which this has reacheda specified value. Under these circumstances, the least error willusually be made by averaging the measured values at about 50% of thespecified value. Obviously other values can also be sought. Smallervalues, for example, have the advantage that less accuracy is necessaryin determination of the actual amplitude of the image spot.

Hereinafter it will be assumed that the image location and the samplingfrequency have already been correctly adjusted. In addition, access tothe data of the analog-to-digital converters will be supposed to bepossible. The rising edge and the falling edge will be determined asfollows, for which purpose the following steps will be performed.

Rising Edge

1. Search for a spot in the first image column which has a sufficientlyhigh, and if at all possible maximal R, G or B value.

2. Since the phase in 1. could have been preadjusted such that themeasurement is erroneous, the actual value of the amplitude may behigher. Determine the actual value of the amplitude by a measurement atsuitable sampling instant by retarding the phase until the measuredamplitude values no longer continue to increase, or by advancing thephase so far at first until the measured amplitude values are very lowand this value of the phase, which marks the beginning of the edge, isstill retarded by half the pixel width.3. Shift the phase so far toward the back-porch that the sampling valueaveraged over several measurements decreases to about 50% of the valuedetermined in 2. Store this value of the phase temporarily, since therising edge is present here.Falling Edge4. Search for one spot in the last image column which has a sufficientlyhigh and if at all possible maximum R, G and B value. In order to obtainthe most accurate possible measured values, the phase should beadjusted, before sampling is performed, to the value found in 2.5. Shift the phase so far toward the front porch that the averagedsampling value decreases to about 50% of the value determined in 4. Thefalling edge is located at this point.

Alternatively, the sampling instant can also be found by determining therising edge of a video pulse of a sufficiently bright image spot, and byadjusting the phase such that the sampling instant is shiftedapproximately by half the width of an image spot toward the pixelcenter, or alternatively by determining the falling edge of the videopulse at a sufficiently bright image spot, and by adjusting the phasesuch that the sampling instant is shifted by approximately approximatelyhalf the width of an image spot toward the pixel center. Steps 1 to 5described hereinabove are then correspondingly simplified.

The ideal sampling instant is theoretically located exactly between thetwo edges. In practice, it may be advantageous to sample at a slightdelay from the midpoint between two edges rather than exactly at suchmidpoint, in order to keep away from possible overshoots of the graphicscard and to allow for the often slightly exponential character of theedges.

Depending on the graphics card being used, it is occasionallyadvantageous to advance or retard the sampling instant slightly relativeto the value determined by matching. For this purpose the device isprovided with means which allow the user to change the sampling instantcompared with the value determined by matching, in which case an offsetadjusted in this way is taken into consideration during automaticmatching. Via the OSD, for example, the user can change the samplinginstant slightly, and this offset is then taken into consideration bythe closed-loop control system.

The hardware of the invention comprises a device which determines therising edge of a video pulse of a sufficiently bright, a device whichdetermines the falling edge of the video pulse at a sufficiently brightimage spot, an adjusting device with which the phase is adjusted suchthat the sampling instant is located approximately at the midpointbetween the rising and falling edges of a video pulse, and a device forshifting the phase for determination of the sampling value of the imagespot until the measured amplitude values no longer differ significantly,whereupon the sampling value determined then is further processed.

Furthermore, a device is provided which advances the phase used fordetermination of the sampling value sufficiently that the measuredamplitude values are smaller than a predetermined limit value, such assmaller than 50% of the sampling value, and by a device which thenretards the phase by half the width of an image spot, whereupon thesampling value measured then is further processed.

Finally, there are provided a device which shifts the phase fordetermination of the rising edge sufficiently far toward the back-porchregion that the measured amplitude value decreases to a predeterminedpercentage, such as 50% of the previously determined amplitude value,whereupon this value of the phase is stored temporarily as the positionof the rising edge, and a device which shifts the phase fordetermination of the falling edge sufficiently far toward thefront-porch region that the measured amplitude value decreases to apredetermined percentage, such as 50% of the previously determinedamplitude value, whereupon this value of the phase is stored temporarilyas the position of the falling edge.

According to FIG. 7, an adjusting device for shifting the phase isprovided with a circuit containing two PLL circuits PLL1 and PLL2, whoseoutputs A1 and A2 can be adjusted independently of one another asregards their phase. The outputs are relayed via a switch S to a commonoutput A. The switch S is an electronic switch, which is operatedaccording to a program.

According to FIG. 8, an adjusting device for shifting the phase isprovided with a PLL circuit PLL having two clock outputs A1 and A2,whose output clock signals can be adjusted independently of one anotheras regards their phase. The two output signals are in turn delivered viaa switch S to the output A.

If the one output of the PLL circuit were responsible merely fordetermination of the ideal sampling phase, whereas the other output ofthe PLL circuit were to supply the sampling clock for the entire image,the phase determined via the first output would have to be capable ofbeing received at the second output. During reception of the determinedideal phase by the second output, it would be possible for an avoidableerror to creep in. In a preferred practical example of the invention,therefore, it is provided that both outputs of the PLL circuitoptionally deliver a sampling signal for matching and a sampling signalfor the entire image. Thereby the need to receive the phase iseliminated. An electronic changeover unit can decide via the switch Swhich output is responsible at which instant for which sampling signal.The outputs of the PLL circuit then have the following function, forexample, during the closed-loop control process:

Step Information to be sampled Sampling pulse arrives from 1. Edge ofthe reference spot Output 1 2. Remaining image spots Output 2 3. Repeatsteps 1. + 2. until the ideal phase for output 1 has been determined 4.Edge of the reference spot Output 2 5. Remaining image spots Output 1(with previously determined phase) 6. Repeat steps 4. + 5. until theideal phase for output 2 has been determined 7. Edge of the referencespot Output 1 6. Remaining image spots Output 2 (with previouslydetermined phase) 9. Repeat steps 7. + 8. until the ideal phase foroutput 1 has been determined Repeat steps 4. through 9. cyclically

Against the background that the ideal sampling instant is located ½pixel width after the rising edge or before the falling edge L of apixel, an embodiment of the invention that is advantageous from theviewpoint of complexity of construction can be designed such that thereis provided a PLL circuit which is programmed in such a way that itoscillates with an integral multiple of the needed sampling frequency.Downstream from the PLL circuit there is then connected a frequencydivider, which divides the sampling frequency of the PLL circuit by afactor n, wherein n sampling signals phase-shifted by 1/n periodsrelative to one another can be generated. When n=2 is selected and whenthe phase of the PLL circuit is adjusted such that the one output is inphase with one edge of the pixel, the other output supplies a clockwhich is phase-shifted by ½ pixel relative to the edge and thus isideally suitable for sampling. This arrangement enjoys the advantagethat it can be made simply and inexpensively since, instead of two PLLcircuits, only two digital elements which supply a phase-shifted signalare needed. Since a very narrow zone around the pixel edge must beexamined in order to find the correct phase during matching, it is not aserious drawback for practical purposes that the phases are coupled withone another in this case, or in other words the phase of the actualsampling signal is also adjusted during an adjustment of the samplingphase for matching.

Finally, the following information must also be pointed out: Asmentioned hereinabove, an image spot whose intensity satisfies certainminimum requirements must be found for determination of the phase. Inthis connection, it may be advantageous to determine several image spotswith intentionally different intensity. Any slight deviations that maybe present in the results could then be averaged out.

1. A method for correcting the phase difference between a pixel clock ofa graphics card and a sampling clock of a flat-panel display with ananalog interface in a system having a flat-panel display, a graphicscard and a computer, comprising: determining an ideal phase differencebetween the pixel clock of the graphics card and the sampling clock ofthe flat panel display; and performing an automatic adjustment of theideal phase difference repeatedly during continued operation of thedisplay to compensate for phase drift during the continued operation ofthe display by providing an updated ideal phase difference; wherein anideal phase difference adjustment necessary for an instantaneouscondition of the system during continued operation of the display isdetermined only at individual image spots, and the determined idealphase difference adjustment is then applied to the entire display as thedisplay displays images; wherein said automatic adjustment of the idealphase difference comprises selecting a sufficiently bright image spotand the rising edge of a video pulse of this image spot is determined,and the ideal phase difference is adjusted such that a sampling instantfor an entire image is situated approximately at the midpoint betweenrising and falling edges of the video pulse.
 2. The method according toclaim 1, wherein the automatic adjustment of the ideal phase differenceis performed continuously.
 3. The method according to claim 1, whereinthe automatic adjustment of the ideal phase difference is performedperiodically.
 4. The method according to claim 1, wherein said automaticadjustment of the ideal phase difference comprises determining a fallingedge of a video pulse at a sufficiently bright image spot, and the idealphase difference is adjusted such that a sampling instant is shifted byapproximately half the width of an image spot toward the center of apixel.
 5. The method according to claim 1, wherein an image area andimage spots are arrayed on the flat-panel display in rows and columnsbetween a back-porch region and a front-porch region, wherein saidautomatic adjustment of the ideal phase difference comprises choosing animage spot in a first image column close to the back-porch region as thesufficiently bright image spot for determination of the rising edge andan image spot in the first image column close to the front-porch regionis chosen as the sufficiently bright image spot for determination of thefalling edge.
 6. The method according to claim 1, wherein said automaticadjustment of the ideal phase difference further comprises measuring thebrightness of a plurality of image spots of the first or last imagecolumn and choosing the image spots with the greatest brightness in thefirst or last image column for determination of the rising or fallingedge respectively of the video pulse.
 7. The method according to claim1, wherein said automatic adjustment of the ideal phase differencefurther comprises measuring image spots (n×k) are with n=1,2, . . . Nand k=constant, and, if no sufficiently bright image spot is found, theimage spots (n+m)×k are measured with m=1, 2, . . . N, until asufficiently bright image spot is found.
 8. The method according toclaim 1, wherein said automatic adjustment of the ideal phase differencefurther comprises for determination of the amplitude values of theselected image spots, shifting the phases at these image spots until themeasured amplitude values no longer change significantly, and furtherprocessing the amplitude values determined.
 9. The method according toclaim 1, wherein said automatic adjustment of the ideal phase differencefurther comprises advancing the phase used for determination ofamplitude values sufficiently so that measured amplitude values aresmaller than a predetermined limit value delaying the phase by half thewidth of a spot, and further processing the measured amplitude value.10. The method according to claim 1, wherein said automatic adjustmentof the ideal phase difference further comprises determining the risingedge of the selected image spots, shifting the phase at the selectedimage spot sufficiently toward the back-porch region so that a measuredamplitude value is reduced to a predetermined percentage-of a previouslydetermined amplitude value, and storing this value of the phasetemporarily as the position of the rising edge.
 11. A method accordingto claim 1, wherein said automatic adjustment of the ideal phasedifference further comprises determining the falling edge of theselected image spots, shifting the phase at the selected image spotsufficiently toward the front-porch region so that a measured amplitudevalue is reduced to a predetermined percentage a previously determinedamplitude value, and storing this value of the phase temporarily as theposition of the falling edge.
 12. A method according to claim 1, furthercomprising delaying the phase or sampling instant relative to themidpoint between the rising and falling edges by a predetermined amount.13. The method according to claim 12, further comprising repeatedlyregenerating a video memory.
 14. A method according to claim 1, furthercomprising masking pixel or pixels that is or are influenced ordistorted during determining the ideal phase difference by masking suchpixel or pixels with distortion-free image fragments from a videomemory.
 15. The method according to claim 1, further comprising creatingan offset wherein the sampling instant can be changed by a user comparedwith the value determined during determining the ideal phase differencein which case said offset is used during an automatic matching.
 16. Themethod according to claim 1, wherein when performing an automaticadjustment of the ideal phase difference, the adjusted ideal phasedifference may be unchanged from the immediately preceding one.
 17. Adevice for correcting the phase difference between the pixel clock of agraphics card and the sampling clock of a flat-panel display with ananalog interface in a system having a flat-panel display, a graphicscard and a computer, comprising: a processor for repeatedly determiningan ideal phase difference between a pixel clock of a graphics card and asampling clock of a flat panel display; and an adjusting circuit whichrepeatedly performs an automatic adjustment of the ideal phasedifference during the continued operation of the display to compensatefor phase drift during the continued operation of the display and toprovide an updated ideal phase difference; wherein the adjusting circuitdetermines the rising edge of a video pulse of a sufficiently brightimage spot, determines the falling edge of the video pulse at asufficiently bright image spot, and the phase is adjusted such that thesampling instant is located at approximately the midpoint between therising and the falling edges of a video pulse.
 18. The device accordingto claim 17, wherein the automatic adjustment of the ideal phasedifference is performed continuously or periodically.
 19. The deviceaccording to claim 17, wherein the adjusting circuit for adjusting thephase further comprises a circuit containing two PLL circuits, withoutputs which can be adjusted independently of one another as regardstheir phase.
 20. The device according to claim 17, wherein the adjustingcircuit for shifting the phase further comprises a PLL circuit with twoclock outputs with output clock signals which can be adjustedindependently of one another as regards their phase.
 21. The deviceaccording to claim 20, wherein the two outputs of the PLL circuitdeliver a sampling clock signal for matching and a sampling signal forthe entire image.
 22. The device according to claim 21, wherein thesampling clock is delivered alternately by the two outputs of the PLLcircuit.
 23. The device according to claim 17, wherein the adjustingcircuit is structured to make a phase adjustment necessary for theinstantaneous condition of the system which is determined only atindividual image spots, and by which the determined phase adjustment isthen applied to the entire image.
 24. The device according to claim 17,wherein a PLL circuit which is programmed such that it oscillates at anintegral multiple of the needed sampling frequency, and by a downstreamfrequency divider, which divides the sampling frequency of the PLLcircuit by a factor n, wherein n sampling signals phase-shifted by I/nperiods relative to one another can be generated.
 25. The deviceaccording to claim 24, wherein a factor n=2 is used and wherein thephase difference of the PLL circuit is adjusted such that one samplingsignal is in phase with one edge of the pixel, and the other samplingsignal is shifted by ½ pixel in its phase difference.
 26. A device forcorrecting the phase difference between the pixel clock of a graphicscard and the sampling clock of a flat-panel display with an analoginterface in a system having a flat-panel display, a graphics card and acomputer, comprising: a processor for repeatedly determining an idealphase difference between a pixel clock of a graphics card and a samplingclock of a flat panel display; and an adjusting circuit which repeatedlyperforms an automatic adjustment of the ideal phase difference duringthe continued operation of the display to compensate for phase driftduring the continued operation of the display and to provide an updatedideal phase difference; wherein the adjusting circuit determines therising edge of a video pulse of a sufficiently bright image spot, andthe phase is adjusted such that the sampling instant is shifted byapproximately half the width of an image spot toward the center of thepixel.
 27. A device for correcting the phase difference between thepixel clock of a graphics card and the sampling clock of a flat-paneldisplay with an analog interface in a system having a flat-paneldisplay, a graphics card and a computer, comprising: a processor forrepeatedly determining an ideal phase difference between a pixel clockof a graphics card and a sampling clock of a flat panel display; and anadjusting circuit which repeatedly performs an automatic adjustment ofthe ideal phase difference during the continued operation of the displayto compensate for phase drift during the continued operation of thedisplay and to provide an updated ideal phase difference; wherein theadjusting circuit determines the falling edge of a video pulse at asufficiently bright image spot, and the phase is adjusted such that thesampling instant is shifted by approximately half the width of an imagespot toward the center of the pixel.
 28. A device for correcting thephase difference between the pixel clock of a graphics card and thesampling clock of a flat-panel display with an analog interface in asystem having a flat-panel display, a graphics card and a computer,comprising: a processor for repeatedly determining an ideal phasedifference between a pixel clock of a graphics card and a sampling clockof a flat panel display; and an adjusting circuit which repeatedlyperforms an automatic adjustment of the ideal phase difference duringthe continued operation of the display to compensate for phase driftduring the continued operation of the display and to provide an updatedideal phase difference; wherein the adjusting circuit for shifting thephase for determination of the sampling value of the image spot untilthe measured amplitude values no longer differ significantly, whereuponthe sampling value determined then is further processed.
 29. A devicefor correcting the phase difference between the pixel clock of agraphics card and the sampling clock of a flat-panel display with ananalog interface in a system having a flat-panel display, a graphicscard and a computer, comprising: a processor for repeatedly determiningan ideal phase difference between a pixel clock of a graphics card and asampling clock of a flat panel display; and an adjusting circuit whichrepeatedly performs an automatic adjustment of the ideal phasedifference during the continued operation of the display to compensatefor phase drift during the continued operation of the display and toprovide an updated ideal phase difference; wherein the adjusting circuitadvances the phase used for determination of the sampling valuesufficiently that the measured amplitude values are smaller than apredetermined limit value, such as smaller than 50% of the samplingvalue, and by a device which then retards the phase by half the width ofan image spot, whereupon the sampling value measured then is furtherprocessed.
 30. A device for correcting the phase difference between thepixel clock of a graphics card and the sampling clock of a flat-paneldisplay with an analog interface in a system having a flat-paneldisplay, a graphics card and a computer, comprising: a processor forrepeatedly determining an ideal phase difference between a pixel clockof a graphics card and a sampling clock of a flat panel display; and anadjusting circuit which repeatedly performs an automatic adjustment ofthe ideal phase difference during the continued operation of the displayto compensate for phase drift during the continued operation of thedisplay and to provide an updated ideal phase difference; wherein theadjusting circuit shifts the phase for determination of the rising edgesufficiently far toward a back-porch region that the measured amplitudevalue decreases to a predetermined percentage, such as 50% of thepreviously determined amplitude value, whereupon this value of the phaseis stored temporarily as the position of the rising edge.
 31. A devicefor correcting the phase difference between the pixel clock of agraphics card and the sampling clock of a flat-panel display with ananalog interface in a system having a flat-panel display, a graphicscard and a computer, comprising: a processor for repeatedly determiningan ideal phase difference between a pixel clock of a graphics card and asampling clock of a flat panel display; and an adjusting circuit whichrepeatedly performs an automatic adjustment of the ideal phasedifference during the continued operation of the display to compensatefor phase drift during the continued operation of the display and toprovide an updated ideal phase difference; wherein a device which shiftsthe phase for determination of the falling edge sufficiently far towardthe front-porch region that the measured amplitude value decreases to apredetermined percentage whereupon this value of the phase is storedtemporarily as the position of the falling edge.
 32. A device forcorrecting the phase difference between the pixel clock of a graphicscard and the sampling clock of a flat-panel display with an analoginterface in a system having a flat-panel display, a graphics card and acomputer, comprising: a processor for repeatedly determining an idealphase difference between a pixel clock of a graphics card and a samplingclock of a flat panel display; and an adjusting circuit which repeatedlyperforms an automatic adjustment of the ideal phase difference duringthe continued operation of the display to compensate for phase driftduring the continued operation of the display and to provide an updatedideal phase difference; wherein the adjusting circuit uses an offset bywhich the sampling instant can be changed by the user compared with thevalue determined during matching, in which case said offset is usedduring automatic matching.
 33. A method for correcting the phasedifference between a pixel clock of a graphics card and a sampling clockof a flat-panel display with an analog interface in a system having aflat-panel display, a graphics card and a computer, comprising:determining an ideal phase difference between the pixel clock of thegraphics card and the sampling clock of the flat panel display;performing an automatic adjustment of the ideal phase differencerepeatedly during continued operation of the display to compensate forphase drift during the continued operation of the display by providingan updated ideal phase difference based on which a sampling instant forthe entire image is situated approximately at a midpoint between therising and falling edges of a video pulse.
 34. A method for correctingthe phase difference between a pixel clock of a graphics card and asampling clock of a flat-panel display with an analog interface in asystem having a flat-panel display, a graphics card and a computer,comprising: determining an ideal phase difference between the pixelclock of the graphics card and the sampling clock of the flat paneldisplay; performing an automatic adjustment of the ideal phasedifference repeatedly during continued operation of the display tocompensate for phase drift during the continued operation of the displayby providing an updated ideal phase difference; wherein the ideal phasedifference adjustment necessary for an instantaneous condition of thesystem during continued operation of the display is determined only atindividual image spots, and the determined ideal phase differenceadjustment is then applied to the entire display as the display displaysimages; and wherein the updated ideal phase difference is such that asampling instant for the entire image is situated approximately at amidpoint between the rising and falling edges of a video pulse.
 35. Amethod for correcting the phase difference between a pixel clock of agraphics card and a sampling clock of a flat-panel display with ananalog interface in a system having a flat-panel display, a graphicscard and a computer, comprising: determining an ideal phase differencebetween the pixel clock of the graphics card and the sampling clock ofthe flat panel display; and performing an automatic adjustment of theideal phase difference repeatedly during continued operation of thedisplay to compensate for phase drift during the continued operation ofthe display by providing an updated ideal phase difference; wherein anideal phase difference adjustment necessary for an instantaneouscondition of the system during continued operation of the display isdetermined only at individual image spots, and the determined idealphase difference adjustment is then applied to the entire display as thedisplay displays images; wherein said automatic adjustment of the phasedifference comprises determining a rising edge of a video pulse of asufficiently bright image spot and the ideal phase difference isadjusted such that a sampling instant is shifted by approximately halfthe width of an image spot toward the center of a pixel.